The present invention relates to a semiconductor device, and particularly to a semiconductor device including a complementary Metal-Oxide-Semiconductor field effect transistor (CMOSFET).
In recent years, the size of a CMOSFET has been miniaturized, and it is expected that the advancement is further made beyond the 0.1 xcexcm generation. After this, it is considered that as the size is miniaturized more, various problems as indicated in the SIA (Semiconductor Industry Association) Roadmap occur.
As the size of the CMOSFET is miniaturized more, problems occur, one of which relates to a gate electrode. Conventionally, although polycrystalline silicon is used for the gate electrode, it is difficult to dope polycrystalline silicon with an impurity at a high concentration. Thus, there is a problem that a gate capacitance is lowered by depletion in polycrystalline silicon makes current driving power increase and interferes with suppression of a short channel effect.
In order to solve this problem, a CMOSFET using metal/oxide/semiconductor field effect transistor (MOSFET), in which metal is used as a material of a gate electrode, has been studied. However, in order to realize a CMOSFET of the sub-0.1 micron generation by using a metal gate, the following problem still remains.
In general, in a CMOSFET having a gate electrode made of metal, in order to simplify a manufacturing process, the same metal is used for the gate electrodes of an n-channel MOSFET and a p-channel MOSFET. In such a CMOSFET, in the case where an impurity concentration in a substrate is set so that the short channel effect is sufficiently suppressed, normally, in both of them, a threshold voltage becomes as high as 0.5 V or higher. Since a power voltage of 1 V or less is expected in the CMOSFET of the sub-0.1 micron generation, such a high threshold voltage causes a drop in current driving power of the MOSFET, and further, a drop in operation speed of a circuit.
The present invention has been made in view of the above problem, and has an object to provide a semiconductor device in which gate electrodes of both an n-channel MOSFET and a p-channel MOSFET constituting a CHOSFET are made of the same material, and a threshold voltage of each of them is sufficiently decreased.
Another object of the present invention is to provide a semiconductor device that includes an n-channel MOSFET and a p-channel MOSFET constituting a CMOSFET and can be manufactured by a simplified process.
According to a first aspect of the present invention, a semiconductor device comprises a semiconductor substrate, and an n-channel field effect transistor and a p-channel field effect transistor respectively formed on the semiconductor substrate, the n-channel field effect transistor and the p-channel field effect transistor constitute a complementary field effect transistor, and the semiconductor device is characterized in that
a gate electrode of the n-channel field effect transistor and a gate electrode of the p-channel field effect transistor are made of the same material,
a channel region of the n-channel field effect transistor is made of at least of Si and in which an energy difference between a conduction band edge and a vacuum level is higher than that of bulk Si, and a channel region of the p-channel field effect transistor is made of at least of Si and in which an energy difference between a valence band edge and the vacuum level is lower than that of bulk Si,
a work function of the material making the gate electrodes is higher than the energy difference between the conduction band edge of the material making the channel region of the n-channel field effect transistor and the vacuum level, and is lower than the energy difference between the valence band edge of the material making the channel region of the p-channel field effect transistor and the vacuum level.
At this time, it is preferable to introduce tensile stress into the material making the channel region of the n-channel field effect transistor.
It is preferable to introduce compressive stress into the material making the channel region of the p-channel field effect transistor.
It is preferable that the material making the channel region of the n-channel field effect transistor is Si into which tensile stress is introduced. It is so-called strained Si in this specification.
It is preferable that the material making the channel region of the p-channel field effect transistor is SiGe.
It is preferable that the Fermi level EF of the gate electrode material is (4Ev2 +Ec1)/5 or less and (Ev2 +4Ec1)/5 or less, Ev2 is the valence band edge of the material making the channel region of the p-channel field effect transistor and Ev1 is the conduction band edge of the material making of the channel region of the n-channel field effect transistor.
It is preferable that the Fermi level EF of the gate electrode material is substantially (Ev2 +Ec1)/2, Ev2 is the valence band edge of the material making the channel region of the p-channel field effect transistor and Ec1 is the conduction band edge of the material making of the channel region of the n-channel field effect transistor.
It is preferable that Ec1 of the channel material of the n-channel MOSFET is higher than (Ev0 +Ec0)/ 10 and not higher than (Ev0 +Ec0)/2, Ev0 is the valence band edge of the bulk Si and Ec0 is the conduction band edge of the bulk Si.
It is preferable that Ev2 of the channel material of the p-channel MOSFET is not less than (Ev0 +Ec0)/2 and less than (9Ev0 +Ec0)/10, Evo is the valence band edge of the bulk Si and Ec0 is the conduction band edge of the bulk Si.
According to a second aspect of the present invention, a semiconductor device comprises a semiconductor substrate;
an n-channel field effect transistor formed on the semiconductor substrate; and a p-channel field effect transistor formed on the semiconductor substrate, the n-channel field effect transistor and the p-channel field effect transistor constituting a complementary field effect transistor, wherein a gate electrode of the n-channel field effect transistor and a gate electrode of the p-channel field effect transistor are made of a same material, wherein at least a part of a channel region of the n-channel field effect transistor is formed in a strained Si layer, wherein at least a part of a channel region of the p-channel field effect transistor is formed in a first SiGe layer, and wherein a work function of the material making the gate electrodes is higher than an energy difference between a conduction band edge of the strained Si layered and a vacuum level, and is lower than an energy difference between a valence band edge of the first SiGe layer and the vacuum level.
It is preferable that the n-channel field effect transistor includes a second SiGe layer, which has the same composition ratio as the first SiGe layer and is disposed between the semiconductor substrate and the strained Si layer, and a tensile stress is introduced into the strained Si layer from the second SiGe layer.
It is preferable that the n-channel field effect transistor includes a second SiGe layer which has a Ge concentration higher than the first SiGe layer and is disposed between the semiconductor substrate and the strained Si layer, the p-channel field effect transistor includes a third SiGe layer which has the same composition ratio as the second SiGe layer and is disposed between the semiconductor substrate and the first SiGe layer, a tensile stress is introduced into the strained Si layer from the second SiGe layer, and compressive stress is introduced into the first SiGe layer from the third SiGe layer.
It is preferable that the p-channel field effect transistor includes a Si layer between the first SiGe layer the third SiGe layer.
It is preferable that the first SiGe layer composes Si1xe2x88x92xGex and the second SiGe layer composes Si1xe2x88x92yGey (y greater than x).
According to the first or second aspect of the invention, it is preferable that the gate electrodes of the n-channel field effect transistor and p-channel field effect transistor are made of a material selected from the group consisting of metal, doped p-type polycrystalline Ge, and doped p-type polycrystalline SiGe.
According to the first or second aspect of the invention, it is preferable that the semiconductor device further comprises an insulating film between the semiconductor substrate and the n-channel field effect transistor/the p-channel field effect transistor.
According to the first or second aspect of the invention, it is preferable that the semiconductor device further comprises an insulating film between the semiconductor substrate and the complementary field effect transistor.
According to the third aspect of the invention, a semiconductor device comprises a semiconductor substrate; an n-channel field effect transistor formed on the semiconductor substrate; and a p-channel field effect transistor formed on the semiconductor substrate, the n-channel field effect transistor and the p-channel field effect transistor constituting a complementary field effect transistor, wherein a gate electrode of the n-channel field effect transistor and a gate electrode of the p-channel field effect transistor are made of a same material, and wherein one of the n-channel field effect transistor and the p-channel field effect transistor includes a first semiconductor layer in which at least a part of a channel region is formed, the other of the n-channel field effect transistor and the p-channel field effect transistor includes a second semiconductor layer in which at least a part of a channel region is formed and a third semiconductor layer as its under layer, and the first semiconductor layer and the third semiconductor layer are made of a same material.
It is preferable that the semiconductor device comprises further an insulating film between the semiconductor substrate and the complementary field effect transistor.
It is preferable that a work function of the material making the gate electrodes of the n-channel field effect transistor and p-channel field effect transistor is higher than an energy difference between a conduction band edge of a material making the channel region of the n-channel field effect transistor and a vacuum level, and is lower than an energy difference between a valence band edge of a material making the channel region of the p-channel field effect transistor and the vacuum level.
According to the first aspect of the invention, an energy difference between a conduction band edge of a material making the channel region of the n-channel field effect transistor and vacuum level and an energy difference between a valence band edge of a material making the channel region of the p-channel field effect transistor and the vacuum level are controlled such as above described and a work function of the material making the gate electrodes is in an energy difference between two energies. Thus, the threshold of the n-channel field effect transistor and p-channel field effect transistor can decrease.
According to the second aspect of the invention, since at least a part of a channel region of the n-channel field effect transistor is formed in a strained Si layer, an energy difference between a conduction band edge of the strained Si and a vacuum level can be higher than that of bulk Si and vacuum level. Since at least apart of a channel region of the p-channel field effect transistor is formed in a SiGe, which is an energy difference between a valence band edge of Ge and vacuum level is lower than that of bulk Si and a vacuum level, an energy difference between a valence band edge of the SiGe and vacuum level can be lower than that of bulk Si and vacuum.
An energy difference between a conduction band edge of the strained Si making the channel region of the n-channel field effect transistor and vacuum level and an energy difference between a valence band edge of the SiGe making the p-channel field effect transistor and the vacuum level are controlled such as above described and a work function of the material making the gate electrode is in an energy difference between two energies. Thus, the threshold of the n-channel field effect transistor and p-channel field effect transistor can decrease.
According to the third aspect of the invention, a composition of the first semiconductor layer and the third semiconductor layer is same and a tensile stress is introduced into the second semiconductor layer from the third semiconductor layer. The first and third semiconductor layers are deposited at same time. The tensile stress is introduced into the second semiconductor layer by depositing the second semiconductor layer on the third semiconductor layer. The second semiconductor layer can be strained with no increasing of another procedure, comparing to comprise the first and second semiconductor layer by different material.
In order to produce the semiconductor of the invention, a method of manufacturing a semiconductor device including a semiconductor substrate, and an n-channel field effect transistor and a p-channel field effect transistor respectively formed on the semiconductor substrate, the n-channel field effect transistor and the p-channel field effect transistor constituting a complementary field effect transistor, the method is characterized by comprises;
forming a first semiconductor layer on one main surface of the semiconductor substrate; forming a second semiconductor layer on a part of the first semiconductor layer, into which tensile stress or compressive stress is introduced from the first semiconductor layer;
splitting the first and second semiconductor layers into elements correspondingly to the n-channel field effect transistor and the p-channel field effect transistor;
forming a gate insulating film on the first and second semiconductor layers;
forming gate electrodes on the gate insulating film correspondingly to the n-channel field effect transistor and the p-channel field effect transistor at the same time; and
injecting an impurity into the first and second semiconductor layers using the gate electrodes as masks.